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ref: work-2009 tags: bipolar opamp design current control microstimulation date: 01-06-2012 20:13 gmt revision:15 [14] [13] [12] [11] [10] [9] [head]

Recently I've been working on a current-controlled microstimulator for the lab, and have not been at all satisfied with the performance - hence, I decided to redesign it.

Since it is a digitally current-controlled stimulator, and the current is set with a DAC (MCP4822), we need a voltage controlled current source. Here is one design:

  • Because the output of the DAC is ground-referenced, and there is no negative supply in the design, the input buffers must be PNP transistors. These level-shift the input (0-2V, corresponding to 0-400uA) + 0.65V ( V beV_{be} ), and increase the current. Both are biased with 1uA here, though 10uA would also work (lazily, through 1M resistors - I've checked that these work well too). This sets the base current at about 10nA for Q2 and Q1.
  • Q3 and Q4 are a current-mirror pair. If Q1 Vb increases, Ie for Q3 will decrease, increasing Ib for Q4 and hence its Ic. This will decrease the base current in Q6 and Q5, as desired. On the other hand, increasing Q2 Vb will decrease Q4 Ic, increasing Ib in Q6 and Q5. The current mirror effects the needed negative feedback in the circuit. This mirror could also be implemented with PNP transistors, but it doesn't work as well as then the collector (which has voltage gain) is tied to the emitter of the input PNP transistors. Voltage gain is needed to drive Q5 / Q6.
  • Q5 & Q6 are Darlington cascaded NPN transistors for current gain. If Q6 is omitted, Ib in Q5 increases -> Ib in Q1 decreases -> Ic in Q3 decreases -> Ib in Q4 increases. This results in a set-point of Ib = 100nA in Q5 -> Ic ~10uA. (unacceptable for our task).

What I really need is a high-side regulated current source; after some fiddling, here is what I came up with:

  • V2 is from the DAC; for the testing, I just simulate with a votlage ramp. This circuit, due to the 5V biasing (I have 5V available for the DAC, hence might as well use it) works well up to about 4V input voltage - exactly what the DAC can produce.
  • Q1 and Q2 are biased through 1M resistors R6 and R8; their emitters are coupled to a common-emitter amplifier Q3 and Q4.
  • As the voltage across R1 increases, Ib in Q1 decreases. This puts more current through the base of Q4, increasing the emitter voltage on both Q3 and Q4. This reduces the current in Q3, hence reducing the current in Q5 -> the voltage across R1. feedback ;-)
  • I tried using a current mirror on the high-side, but according to spice, this actually works *worse*. Q5 & Q3 / Q4 have more than enough gain as it stands.
  • Yes, that's 100V - the electrodes we use have high impedance, so need a good bit of voltage to get the desired current.
  • Now, will need to build this circuit to verify that it actually works.

  • (click for the full image)
  • This simulates OK, but shows some bad transients related to switching - I'll have to inspect this more closely, and possibly tune the differential stage (e.g. remove the fast transient response - Q6 and Q12 seem to turn off before Q5 and Q11 do, which pulls the output to +50v briefly)

  • This is the biphasic, bipolar stimulator's response to a rising ramp command voltage, as measured by the current through R17. Note how clean the signal is :-) But, I'm sure that it won't look quite this nice in real life! Will try one half out on a breadboard to see how it looks.
  • Note I switched from NMOS switching transistors to NPN - Q15 and Q16 shunt the bias current from Q3/Q2 and Q8/Q9, keeping the output PNPs (Q5 and Q11). These transistors are in saturation, so they take 100-200ns to turn off, which should be fine for this application where pulse width is typically 100us.
  • I've fed the pull-down NPN base current from the positive supply here, so that as long as Q5 and Q11 are on, Q6 and Q12 are also on. The storage time here (not that it is much, the transistors are kept out of saturation via D1-4) helps to keep the mean difference in voltage between animal or stimulee's ground and isolated stimulator ground low. In previous stimulators the high-side was a near-saturation PNP, which pulled the voltage all the way to the positive supply when stimulation started. This meant that any stray capacitance had to be charged through the brain - bad!
    • Note this means that the emitter current through Q6 and Q12 is more than the current through R17 by that passed through Q14 and Q13. By design, this is 1/50th that through Q5 and Q11. This means that the actual stimulated current will be 95% of the commanded current, something which is easily corrected in software.

  • Larger view of the schematic. Still worried about stability - perhaps will need to add something to limit slew rate.
  • V2 on the right is the command voltage from the DAC.

  • The amplifier in figure 5 suffered from low bandwidth, primarily because the large resistors effected slow timeconstants, and because there was no short path to +50V from the high-side PNP transistors. This led to very slow turn-off times. To remedy this:
    • Bias current to Q3 & Q4 was increased (R6 & R8 decreased) -> more current to charge / discharge capacitance.
    • Common emitter resistor concomitantly decreased to 22k. This increases the collector current.
    • Pull-up resistors changed to a current mirror. This allows the current through Q4 to pull up the bases of Q5 and Q6, letting them turn off more quickly. If Q1 is off (e.g. voltage across R1 is high), Q4 will be on, and Q6 will source this current. etc.
  • With this done, I tested it on the breadboard & it oscillated. bad! Hence, I put a 1nf (10nf in the schematic) capacitor from the collector of Q3 to ground - hence limiting the slew rate. This abolished oscillations and led to a very pretty linear turn-on waveform.
  • However, the turn-off waveform was an ugly exponential. Why? With Q2 or Q10 fully on, Q3 will be off. Q4 will effectively recharge C1 through R7. As the voltage across R7 goes to zero, so does the charging current. Since I don't want to add in a negative supply, I simply shifted the base voltage of Q3 and Q4 using a diode, about as simple as you can get!
  • Eventually, I replaced R7 with a current source ... but this did not change the fall waveform that much; it is still (partially) exponential. Possibly this is from the emitter resistors on the high-side.

  • As of now, the final version - tested using surface mount devices; seems to work ok!
  • Note added transistor Q11 - this discharges / removes minority carriers from the base of Q8. Even though D1 and D2 guarantee a current-starved Q8 in previous designs, they leave no path to ground from the base, so this transistor was taking forever to turn off. This was especially the case when switching (recall this is one half of a H-bridge, and Q9 would actually be on the other side of the h-bridge), since the other sides' Q9 would push current, while Q8 would continue to conduct & sink current. This current through R1 would increase Q8 emitter voltage, reverse-biasing its' base-emitter junction, making the transistor take 100us of us to turn off. Bad, since the amplifier is intended to replicate 100us pulses! Anyway, Q11 neatly solves the problem (albeit with 100ns or so of saturated-switching storage time - something that Q10 has anyway).
  • D1 and D2 are no longer really necessary, but I've left them in this diagram for illustrative purposes. (and they improve storage time a bit).

  • Update as the result of testing. Changes:
    • Added emitter resistors on the two current mirrors (Q6, Q7; Q12, Q13). This eliminated stability problems
    • Changed the anti-saturation diodes to a resistor. This is needed as it takes some time for Q9 to turn off, and to avoid unbalanced currents through the electrode pairs, this charge should be pulled to ground through Q8. In the actual circuit, Q11 is driven with a 4-8us delayed version of the control signal V4 so that Q8 remains on longer than current source Q9.
    • Decreased C1 to 100pf; because the amplifier is more stable now, the slew rate can be increased.